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| author | Craig Topper <craig.topper@intel.com> | 2017-09-03 22:25:50 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-09-03 22:25:50 +0000 |
| commit | fcf6bc550344794cedfd282df45f384b12c88650 (patch) | |
| tree | 3304201261e87b8131c50d0bd2f9549c79782c65 /llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
| parent | 788fbe08db9c557f8a445540a197e1e9d9c31493 (diff) | |
| download | llvm-fcf6bc550344794cedfd282df45f384b12c88650.zip llvm-fcf6bc550344794cedfd282df45f384b12c88650.tar.gz llvm-fcf6bc550344794cedfd282df45f384b12c88650.tar.bz2 | |
[X86] Add more patterns to use moves to zero the upper portions of a vector register that I missed in r312450.
llvm-svn: 312459
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
0 files changed, 0 insertions, 0 deletions