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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-09 16:02:07 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-09-09 16:02:07 +0000 |
| commit | ebbd6e49768271297d17bcecd22eae2128e24e26 (patch) | |
| tree | 26eec1b36481602683fafa9cd7c3654aa3a1e7f9 /llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
| parent | c34b4036ffe115c7cc03b9236922e98b78adb8b1 (diff) | |
| download | llvm-ebbd6e49768271297d17bcecd22eae2128e24e26.zip llvm-ebbd6e49768271297d17bcecd22eae2128e24e26.tar.gz llvm-ebbd6e49768271297d17bcecd22eae2128e24e26.tar.bz2 | |
AMDGPU: Remove code address space predicates
Fixes 8-byte, 8-byte aligned LDS loads. 16-byte case still broken due
to not be reported as legal.
llvm-svn: 371413
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
| -rw-r--r-- | llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index c301860..07fffae 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -919,6 +919,7 @@ std::string TreePredicateFn::getPredCode() const { if (isAtomic()) { if (getMemoryVT() == nullptr && !isAtomicOrderingMonotonic() && + getAddressSpaces() == nullptr && !isAtomicOrderingAcquire() && !isAtomicOrderingRelease() && !isAtomicOrderingAcquireRelease() && !isAtomicOrderingSequentiallyConsistent() && |