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| author | Oliver Stannard <oliver.stannard@arm.com> | 2018-10-08 14:12:08 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2018-10-08 14:12:08 +0000 |
| commit | 367b4741f4954c9d4013ffcbfb48ca2c535fd6d1 (patch) | |
| tree | a6d1f631906bd362e9850540fb753ecab3439ac2 /llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
| parent | c922116a5152b80fad932b6a963973ffb6eee76c (diff) | |
| download | llvm-367b4741f4954c9d4013ffcbfb48ca2c535fd6d1.zip llvm-367b4741f4954c9d4013ffcbfb48ca2c535fd6d1.tar.gz llvm-367b4741f4954c9d4013ffcbfb48ca2c535fd6d1.tar.bz2 | |
[AArch64][v8.5A] Don't create BR instructions in outliner when BTI enabled
When branch target identification is enabled, we can only do indirect
tail-calls through x16 or x17. This means that the outliner can't
transform a BLR instruction at the end of an outlined region into a BR.
Differential revision: https://reviews.llvm.org/D52869
llvm-svn: 343969
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
0 files changed, 0 insertions, 0 deletions