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author | Craig Topper <craig.topper@sifive.com> | 2021-03-09 09:43:08 -0800 |
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committer | Craig Topper <craig.topper@sifive.com> | 2021-03-09 10:03:45 -0800 |
commit | 351844edf113cfac59992bd330ca3fbfddb01aaf (patch) | |
tree | 3a7a454d032714aa1786d42c38ca46ea2b68ccb1 /llvm/utils/TableGen/CodeGenDAGPatterns.cpp | |
parent | 3ce9e223cb4b31e654b16511dffe1e83df33551c (diff) | |
download | llvm-351844edf113cfac59992bd330ca3fbfddb01aaf.zip llvm-351844edf113cfac59992bd330ca3fbfddb01aaf.tar.gz llvm-351844edf113cfac59992bd330ca3fbfddb01aaf.tar.bz2 |
[RISCV] Add support for VECTOR_REVERSE for scalable vector types.
I've left mask registers to a future patch as we'll need
to convert them to full vectors, shuffle, and then truncate.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D97609
Diffstat (limited to 'llvm/utils/TableGen/CodeGenDAGPatterns.cpp')
-rw-r--r-- | llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index 0d2bbb6..1b996f0 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -714,6 +714,15 @@ bool TypeInfer::EnforceSameNumElts(TypeSetByHwMode &V, TypeSetByHwMode &W) { return Changed; } +namespace { +struct TypeSizeComparator { + bool operator()(const TypeSize &LHS, const TypeSize &RHS) const { + return std::make_tuple(LHS.isScalable(), LHS.getKnownMinValue()) < + std::make_tuple(RHS.isScalable(), RHS.getKnownMinValue()); + } +}; +} // end anonymous namespace + /// 1. Ensure that for each type T in A, there exists a type U in B, /// such that T and U have equal size in bits. /// 2. Ensure that for each type U in B, there exists a type T in A @@ -728,14 +737,16 @@ bool TypeInfer::EnforceSameSize(TypeSetByHwMode &A, TypeSetByHwMode &B) { if (B.empty()) Changed |= EnforceAny(B); - auto NoSize = [](const SmallSet<TypeSize, 2> &Sizes, MVT T) -> bool { + typedef SmallSet<TypeSize, 2, TypeSizeComparator> TypeSizeSet; + + auto NoSize = [](const TypeSizeSet &Sizes, MVT T) -> bool { return !Sizes.count(T.getSizeInBits()); }; for (unsigned M : union_modes(A, B)) { TypeSetByHwMode::SetType &AS = A.get(M); TypeSetByHwMode::SetType &BS = B.get(M); - SmallSet<TypeSize, 2> AN, BN; + TypeSizeSet AN, BN; for (MVT T : AS) AN.insert(T.getSizeInBits()); |