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| author | Shengchen Kan <shengchen.kan@intel.com> | 2023-11-15 13:52:53 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-15 13:52:53 +0800 |
| commit | 51c351f49ed1e1406543fcadc7f6d3a4272e74bd (patch) | |
| tree | 15ab841109dafc9245e169473d33fbb28bf744a2 /llvm/utils/FileCheck/FileCheck.cpp | |
| parent | 8434b0b9d39b7ffcd1f7f7b5746151e293620e0d (diff) | |
| download | llvm-51c351f49ed1e1406543fcadc7f6d3a4272e74bd.zip llvm-51c351f49ed1e1406543fcadc7f6d3a4272e74bd.tar.gz llvm-51c351f49ed1e1406543fcadc7f6d3a4272e74bd.tar.bz2 | |
[X86][MC] Support decoding of EGPR for APX (#72102)
https://github.com/llvm/llvm-project/pull/70958 adds registers R16-R31
(EGPR), this patch
1. Supports decoding of EGPR for instruction w/ REX2 prefix
2. Supports decoding of EGPR for instruction w/ EVEX prefix
For simplicity's sake, we
1. Simulate the REX prefix w/ the 1st payload of REX2
2. Simulate the REX2 prefix w/ the 2nd and 3rd payloads of EVEX
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Explanations for some changes:
1. invalid-EVEX-R2.txt is deleted b/c `0x62 0xe1 0xff 0x08 0x79 0xc0` is
valid and decoded to `vcvtsd2usi %xmm0, %r16` now.
2. One line in x86-64-err.txt is removed b/c APX relaxes the limitation
of the 1st and 2nd payloads of EVEX prefix, so the error message changes
Diffstat (limited to 'llvm/utils/FileCheck/FileCheck.cpp')
0 files changed, 0 insertions, 0 deletions