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| author | Jack Styles <99514724+Stylie777@users.noreply.github.com> | 2024-03-27 07:49:38 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-27 07:49:38 +0000 |
| commit | defc4859b032ccaec69f24b6cfd9882fece5f093 (patch) | |
| tree | 9f681c34e98a7ec8d38f11059fadac55cef187dd /llvm/unittests/TargetParser/TargetParserTest.cpp | |
| parent | 6d13263d4a723689d025423562269ea6ccb6bfc2 (diff) | |
| download | llvm-defc4859b032ccaec69f24b6cfd9882fece5f093.zip llvm-defc4859b032ccaec69f24b6cfd9882fece5f093.tar.gz llvm-defc4859b032ccaec69f24b6cfd9882fece5f093.tar.bz2 | |
[AArch64] Remove Automatic Enablement of FEAT_F32MM (#85203)
When `+sve` is passed in the command line, if the Architecture being
targeted is V8.6A/V9.1A or later, `+f32mm` is also added. This enables
FEAT_32MM, however at the time of writing no CPU's support this. This
leads to the FEAT_32MM instructions being compiled for CPU's that do not
support them.
This commit removes the automatic enablement, however the option is
still able to be used by passing `+f32mm`.
Diffstat (limited to 'llvm/unittests/TargetParser/TargetParserTest.cpp')
| -rw-r--r-- | llvm/unittests/TargetParser/TargetParserTest.cpp | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index a7d0b16..2c72a72 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -2347,13 +2347,6 @@ AArch64ExtensionDependenciesBaseArchTestParams {}, {"aes", "sha2", "sha3", "sm4"}}, - // +sve implies +f32mm if the base architecture is v8.6A+ or v9.1A+, but - // not earlier architectures. - {AArch64::ARMV8_5A, {"sve"}, {"sve"}, {"f32mm"}}, - {AArch64::ARMV9A, {"sve"}, {"sve"}, {"f32mm"}}, - {AArch64::ARMV8_6A, {"sve"}, {"sve", "f32mm"}, {}}, - {AArch64::ARMV9_1A, {"sve"}, {"sve", "f32mm"}, {}}, - // +fp16 implies +fp16fml for v8.4A+, but not v9.0-A+ {AArch64::ARMV8_3A, {"fp16"}, {"fullfp16"}, {"fp16fml"}}, {AArch64::ARMV9A, {"fp16"}, {"fullfp16"}, {"fp16fml"}}, @@ -2520,10 +2513,10 @@ AArch64ExtensionDependenciesBaseCPUTestParams {}}, {"cortex-a520", {}, - {"v9.2a", "bf16", "crc", "dotprod", "f32mm", "flagm", - "fp-armv8", "fullfp16", "fp16fml", "i8mm", "lse", "mte", - "pauth", "perfmon", "predres", "ras", "rcpc", "rdm", - "sb", "neon", "ssbs", "sve", "sve2-bitperm", "sve2"}, + {"v9.2a", "bf16", "crc", "dotprod", "flagm", "fp-armv8", + "fullfp16", "fp16fml", "i8mm", "lse", "mte", "pauth", + "perfmon", "predres", "ras", "rcpc", "rdm", "sb", + "neon", "ssbs", "sve", "sve2-bitperm", "sve2"}, {}}, // Negative modifiers |