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| author | quic_hchandel <quic_hchandel@quicinc.com> | 2025-03-29 08:17:29 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-28 19:47:29 -0700 |
| commit | edef028029c4785dfe23c06731de4fc9f34d5cd5 (patch) | |
| tree | c2ffba5462b9c5213d15eb16d42eb2885c2f0aa6 /llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | |
| parent | f8ffbaebed1a7ac82a445a22630fefb769f0d08b (diff) | |
| download | llvm-edef028029c4785dfe23c06731de4fc9f34d5cd5.zip llvm-edef028029c4785dfe23c06731de4fc9f34d5cd5.tar.gz llvm-edef028029c4785dfe23c06731de4fc9f34d5cd5.tar.bz2 | |
[RISCV] Add Qualcomm uC Xqciio (External Input Output) extension (#132721)
This extension adds two external input output instructions for
non-memory-mapped device.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0
This patch adds assembler only support.
Co-authored-by: Sudharsan Veeravalli <quic_svs@quicinc.com>
Diffstat (limited to 'llvm/unittests/TargetParser/RISCVISAInfoTest.cpp')
| -rw-r--r-- | llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp index b3808a3..2ec27ba 100644 --- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp +++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp @@ -667,9 +667,9 @@ TEST(ParseArchString, RejectsConflictingExtensions) { {"rv64i_xqcisls0p2", "rv64i_xqcia0p4", "rv64i_xqciac0p3", "rv64i_xqcicsr0p2", "rv64i_xqcilsm0p2", "rv64i_xqcicm0p2", "rv64i_xqcics0p2", "rv64i_xqcicli0p2", "rv64i_xqciint0p4", - "rv64i_xqcilo0p2", "rv64i_xqcilia0p2", "rv64i_xqcibm0p4", - "rv64i_xqcibi0p2", "rv64i_xqcili0p2", "rv64i_xqcisim0p2", - "rv64i_xqcilb0p2", "rv64i_xqcisync0p2"}) { + "rv64i_xqciio0p1", "rv64i_xqcilo0p2", "rv64i_xqcilia0p2", + "rv64i_xqcibm0p4", "rv64i_xqcibi0p2", "rv64i_xqcili0p2", + "rv64i_xqcisim0p2", "rv64i_xqcilb0p2", "rv64i_xqcisync0p2"}) { EXPECT_THAT( toString(RISCVISAInfo::parseArchString(Input, true).takeError()), ::testing::EndsWith(" is only supported for 'rv32'")); @@ -1159,6 +1159,7 @@ Experimental extensions xqcics 0.2 xqcicsr 0.2 xqciint 0.4 + xqciio 0.1 xqcilb 0.2 xqcili 0.2 xqcilia 0.2 |