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| author | Rux124 <jhlee755@andestech.com> | 2025-09-23 14:03:30 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-23 06:03:30 +0000 |
| commit | d34f738562d824c237ec35cfff3ec34f57ba41b0 (patch) | |
| tree | 0ea7bd74d244d20b2fd910ad5e02f1658dde383b /llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | |
| parent | 9b75446940c0ed3f4d66991f855bb048015f0a50 (diff) | |
| download | llvm-d34f738562d824c237ec35cfff3ec34f57ba41b0.zip llvm-d34f738562d824c237ec35cfff3ec34f57ba41b0.tar.gz llvm-d34f738562d824c237ec35cfff3ec34f57ba41b0.tar.bz2 | |
[RISCV] Add MC layer support for Andes XAndesVSIntH extension. (#159514)
Add MC layer support for Andes XAndesVSIntH extension. The spec is
available at:
https://github.com/andestech/andes-v5-isa/releases/tag/ast-v5_4_0-release
Diffstat (limited to 'llvm/unittests/TargetParser/RISCVISAInfoTest.cpp')
| -rw-r--r-- | llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp index b8efab6..5c6c824 100644 --- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp +++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp @@ -1137,6 +1137,7 @@ R"(All available -march extensions for RISC-V xandesvbfhcvt 5.0 xandesvdot 5.0 xandesvpackfph 5.0 + xandesvsinth 5.0 xandesvsintload 5.0 xcvalu 1.0 xcvbi 1.0 |