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| author | quic_hchandel <quic_hchandel@quicinc.com> | 2025-03-18 15:18:43 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-18 15:18:43 +0530 |
| commit | 036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4 (patch) | |
| tree | 806f1ebed241808dfd3b0acc800cf0cd73d9adfd /llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | |
| parent | 194eceff4327912e6f9167478262961d50516750 (diff) | |
| download | llvm-036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4.zip llvm-036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4.tar.gz llvm-036c6cb37c5647017f98291b3ecd6fb5a2ee2cf4.tar.bz2 | |
[RISCV] Add Qualcomm uC Xqcibi (Branch Immediate) extension (#130779)
This extension adds twelve conditional branch instructions that use an
immediate operand for the source.
The current spec can be found at:
https://github.com/quic/riscv-unified-db/releases/tag/Xqci-0.7.0
This patch adds assembler only support.
Co-authored-by: Sudharsan Veeravalli <quic_svs@quicinc.com>
Diffstat (limited to 'llvm/unittests/TargetParser/RISCVISAInfoTest.cpp')
| -rw-r--r-- | llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp index 40a74ce..9efb863 100644 --- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp +++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp @@ -657,8 +657,8 @@ TEST(ParseArchString, RejectsConflictingExtensions) { {"rv64i_xqcisls0p2", "rv64i_xqcia0p4", "rv64i_xqciac0p3", "rv64i_xqcicsr0p2", "rv64i_xqcilsm0p2", "rv64i_xqcicm0p2", "rv64i_xqcics0p2", "rv64i_xqcicli0p2", "rv64i_xqciint0p4", - "rv64i_xqcilo0p2", "rv64i_xqcili0p2", "rv64i_xqcilia0p2", - "rv64i_xqcibm0p4"}) { + "rv64i_xqcilo0p2", "rv64i_xqcilia0p2", "rv64i_xqcibm0p4", + "rv64i_xqcibi0p2", "rv64i_xqcili0p2"}) { EXPECT_THAT( toString(RISCVISAInfo::parseArchString(Input, true).takeError()), ::testing::EndsWith(" is only supported for 'rv32'")); @@ -1136,6 +1136,7 @@ Experimental extensions xqccmp 0.1 xqcia 0.4 xqciac 0.3 + xqcibi 0.2 xqcibm 0.4 xqcicli 0.2 xqcicm 0.2 |