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| author | Xiang1 Zhang <xiang1.zhang@intel.com> | 2020-11-19 15:16:06 +0800 |
|---|---|---|
| committer | Xiang1 Zhang <xiang1.zhang@intel.com> | 2020-12-04 10:00:13 +0800 |
| commit | f2e292446334de01403cddb9132ae06cc4475175 (patch) | |
| tree | 81863f1cb38f2a13fa8c01f56ecaab53253c099b /llvm/unittests/Support/VirtualFileSystemTest.cpp | |
| parent | 2e83ccc2ee333389110659f3cb313968a0c970d4 (diff) | |
| download | llvm-f2e292446334de01403cddb9132ae06cc4475175.zip llvm-f2e292446334de01403cddb9132ae06cc4475175.tar.gz llvm-f2e292446334de01403cddb9132ae06cc4475175.tar.bz2 | |
[X86] Unbind the ebx with GOT address in regcall calling convention
No register can be allocated for indirect call when it use regcall calling
convention and passed 5/5+ args.
For example:
call vreg (ag1, ag2, ag3, ag4, ag5, ...) --> 5 regs (EAX, ECX, EDX, ESI, EDI)
used for pass args, 1 reg (EBX )used for hold GOT point, so no regs can be
allocated to vreg.
The Intel386 architecture provides 8 general purpose 32-bit registers. RA
mostly use 6 of them (EAX, EBX, ECX, EDX, ESI, EDI). 5 of this regs can be
used to pass function arguments (EAX, ECX, EDX, ESI, EDI).
EBX used to hold the GOT pointer when making function calls via the PLT.
ESP and EBP usually be "reserved" in register allocation.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D91020
Diffstat (limited to 'llvm/unittests/Support/VirtualFileSystemTest.cpp')
0 files changed, 0 insertions, 0 deletions