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| author | Simon Tatham <simon.tatham@arm.com> | 2021-02-11 11:11:55 +0000 |
|---|---|---|
| committer | Tomas Matheson <tomas.matheson@arm.com> | 2021-12-31 16:43:53 +0000 |
| commit | d50072f74e3ee50b750a618fcdf05739dec9542d (patch) | |
| tree | f36d6fbfdc0cebbb239df631edb879744ae5754c /llvm/unittests/Support/TargetParserTest.cpp | |
| parent | b8db44251371afd71d17f2a34a85766188c4b0a8 (diff) | |
| download | llvm-d50072f74e3ee50b750a618fcdf05739dec9542d.zip llvm-d50072f74e3ee50b750a618fcdf05739dec9542d.tar.gz llvm-d50072f74e3ee50b750a618fcdf05739dec9542d.tar.bz2 | |
[ARM] Introduce an empty "armv8.8-a" architecture.
This is the first commit in a series that implements support for
"armv8.8-a" architecture. This should contain all the necessary
boilerplate to make the 8.8-A architecture exist from LLVM and Clang's
point of view: it adds the new arch as a subtarget feature, a definition
in TargetParser, a name on the command line, an appropriate set of
predefined macros, and adds appropriate tests. The new architecture name
is supported in both AArch32 and AArch64.
However, in this commit, no actual _functionality_ is added as part of
the new architecture. If you specify -march=armv8.8a, the compiler
will accept it and set the right predefines, but generate no code any
differently.
Differential Revision: https://reviews.llvm.org/D115694
Diffstat (limited to 'llvm/unittests/Support/TargetParserTest.cpp')
| -rw-r--r-- | llvm/unittests/Support/TargetParserTest.cpp | 55 |
1 files changed, 31 insertions, 24 deletions
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp index 900a944..b21ead1 100644 --- a/llvm/unittests/Support/TargetParserTest.cpp +++ b/llvm/unittests/Support/TargetParserTest.cpp @@ -18,21 +18,21 @@ using namespace llvm; namespace { const char *ARMArch[] = { - "armv2", "armv2a", "armv3", "armv3m", "armv4", - "armv4t", "armv5", "armv5t", "armv5e", "armv5te", - "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl", - "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m", - "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7", - "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r", - "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s", - "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a", - "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a", - "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a", - "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a", - "armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main", - "armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main", - "armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a", - "armv9.2-a", "armv9.2a", + "armv2", "armv2a", "armv3", "armv3m", "armv4", + "armv4t", "armv5", "armv5t", "armv5e", "armv5te", + "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl", + "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m", + "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7", + "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r", + "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s", + "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a", + "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a", + "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a", + "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a", + "armv8.8-a", "armv8.8a", "armv8-r", "armv8r", "armv8-m.base", + "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt", "iwmmxt2", + "xscale", "armv8.1-m.main", "armv9-a", "armv9", "armv9a", + "armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a", }; template <ARM::ISAKind ISAKind> @@ -501,6 +501,8 @@ TEST(TargetParserTest, testARMArch) { EXPECT_TRUE( testARMArch("armv8.7-a", "generic", "v8.7a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a", + ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE( testARMArch("armv9-a", "generic", "v9a", ARMBuildAttrs::CPUArch::v8_A)); @@ -765,15 +767,17 @@ TEST(TargetParserTest, ARMparseHWDiv) { TEST(TargetParserTest, ARMparseArchEndianAndISA) { const char *Arch[] = { - "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t", - "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2", - "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a", - "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m", - "v7m", "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a", - "v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a", - "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r", - "v8m.base", "v8m.main", "v8.1m.main" - }; + "v2", "v2a", "v3", "v3m", "v4", "v4t", + "v5", "v5t", "v5e", "v5te", "v5tej", "v6", + "v6j", "v6k", "v6hl", "v6t2", "v6kz", "v6z", + "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a", + "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", + "v7r", "v7-m", "v7m", "v7k", "v7s", "v7e-m", + "v7em", "v8-a", "v8", "v8a", "v8l", "v8.1-a", + "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a", + "v8.4a", "v8.5-a", "v8.5a", "v8.6-a", "v8.6a", "v8.7-a", + "v8.7a", "v8.8-a", "v8.8a", "v8-r", "v8m.base", "v8m.main", + "v8.1m.main"}; for (unsigned i = 0; i < array_lengthof(Arch); i++) { std::string arm_1 = "armeb" + (std::string)(Arch[i]); @@ -839,6 +843,7 @@ TEST(TargetParserTest, ARMparseArchProfile) { case ARM::ArchKind::ARMV8_5A: case ARM::ArchKind::ARMV8_6A: case ARM::ArchKind::ARMV8_7A: + case ARM::ArchKind::ARMV8_8A: case ARM::ArchKind::ARMV9A: case ARM::ArchKind::ARMV9_1A: case ARM::ArchKind::ARMV9_2A: @@ -1266,6 +1271,8 @@ TEST(TargetParserTest, testAArch64Arch) { ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv8.7-a", "generic", "v8.7a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testAArch64Arch("armv8.8-a", "generic", "v8.8a", + ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9-a", "generic", "v9a", ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9.1-a", "generic", "v9.1a", |
