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| author | David Sherwood <david.sherwood@arm.com> | 2022-11-02 14:58:34 +0000 |
|---|---|---|
| committer | David Sherwood <david.sherwood@arm.com> | 2022-11-07 15:29:40 +0000 |
| commit | cf69895ab31b40fe0d1275a29c4a29283ce327ae (patch) | |
| tree | c1e0dfe932e1baf80ed85344a968eddf64957e95 /llvm/unittests/Support/TargetParserTest.cpp | |
| parent | 5c0cb75787b9a8a7fd488fb05b8350dc798aee9a (diff) | |
| download | llvm-cf69895ab31b40fe0d1275a29c4a29283ce327ae.zip llvm-cf69895ab31b40fe0d1275a29c4a29283ce327ae.tar.gz llvm-cf69895ab31b40fe0d1275a29c4a29283ce327ae.tar.bz2 | |
[AArch64][SVE2] Add the SVE2.1 BF16 instructions
This patch adds the new FEAT_B16B16 feature as well as the
assembly/disassembly for all of the B16B16 instructions:
bfadd: BFloat16 floating-point add vectors
bfsub: BFloat16 floating-point subtract vectors
bfmul: BFloat16 floating-point multiply vectors
bfclamp: BFloat16 floating-point clamp to minimum/maximum number
bfmax: BFloat16 floating-point maximum
bfmaxnm: BFloat16 floating-point maximum number
bfmin: BFloat16 floating-point minimum
bfminnm: BFloat16 floating-point minimum number
bfmla: BFloat16 floating-point fused multiply-add vectors
bfmls: BFloat16 floating-point fused multiply-subtract vectors
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
Differential Revision: https://reviews.llvm.org/D137321
Diffstat (limited to 'llvm/unittests/Support/TargetParserTest.cpp')
| -rw-r--r-- | llvm/unittests/Support/TargetParserTest.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp index 904a731..dd4e5fc 100644 --- a/llvm/unittests/Support/TargetParserTest.cpp +++ b/llvm/unittests/Support/TargetParserTest.cpp @@ -1519,7 +1519,8 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, AArch64::AEK_SME, AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64, AArch64::AEK_SME2, AArch64::AEK_HBC, AArch64::AEK_MOPS, - AArch64::AEK_PERFMON, AArch64::AEK_SVE2p1, AArch64::AEK_SME2p1}; + AArch64::AEK_PERFMON, AArch64::AEK_SVE2p1, AArch64::AEK_SME2p1, + AArch64::AEK_B16B16}; std::vector<StringRef> Features; @@ -1559,6 +1560,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sha3")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2-bitperm")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2p1")); + EXPECT_TRUE(llvm::is_contained(Features, "+b16b16")); EXPECT_TRUE(llvm::is_contained(Features, "+rcpc")); EXPECT_TRUE(llvm::is_contained(Features, "+rand")); EXPECT_TRUE(llvm::is_contained(Features, "+mte")); @@ -1642,6 +1644,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) { {"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"}, {"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"}, {"sve2p1", "nosve2p1", "+sve2p1", "-sve2p1"}, + {"b16b16", "nob16b16", "+b16b16", "-b16b16"}, {"sve2-bitperm", "nosve2-bitperm", "+sve2-bitperm", "-sve2-bitperm"}, {"dotprod", "nodotprod", "+dotprod", "-dotprod"}, {"rcpc", "norcpc", "+rcpc", "-rcpc"}, |