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| author | Tomas Matheson <tomas.matheson@arm.com> | 2022-11-24 15:25:14 +0000 |
|---|---|---|
| committer | Tomas Matheson <tomas.matheson@arm.com> | 2022-11-30 13:37:02 +0000 |
| commit | 7fea6f2e0e606e5339c3359568f680eaf64aa306 (patch) | |
| tree | b16cc2d92763c50ecac7fb066e925d946f20c204 /llvm/unittests/Support/TargetParserTest.cpp | |
| parent | f607884a04b0ca06951227a01d00bc59b948d337 (diff) | |
| download | llvm-7fea6f2e0e606e5339c3359568f680eaf64aa306.zip llvm-7fea6f2e0e606e5339c3359568f680eaf64aa306.tar.gz llvm-7fea6f2e0e606e5339c3359568f680eaf64aa306.tar.bz2 | |
[AArch64] Assembly support for VMSA
Virtual Memory System Architecture (VMSA)
This is part of the 2022 A-Profile Architecture extensions and adds support for
the following:
- Translation Hardening Extension (FEAT_THE)
- 128-bit Page Table Descriptors (FEAT_D128)
- 56-bit Virtual Address (FEAT_LVA3)
- Support for 128-bit System Registers (FEAT_SYSREG128)
- System Instructions that can take 128-bit inputs (FEAT_SYSINSTR128)
- 128-bit Atomic Instructions (FEAT_LSE128)
- Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE)
- Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE)
- Memory Attribute Index Enhancement (FEAT_AIE)
New instructions added:
- FEAT_SYSREG128 adds MRRS and MSRR.
- FEAT_SYSINSTR128 adds the SYSP instruction and TLBIP aliases.
- FEAT_LSE128 adds LDCLRP, LDSET, and SWPP instructions.
- FEAT_THE adds the set of RCW* instructions.
Specs for individual instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/
Contributors:
Keith Walker
Lucas Prates
Sam Elliott
Son Tuan Vu
Tomas Matheson
Differential Revision: https://reviews.llvm.org/D138920
Diffstat (limited to 'llvm/unittests/Support/TargetParserTest.cpp')
| -rw-r--r-- | llvm/unittests/Support/TargetParserTest.cpp | 35 |
1 files changed, 20 insertions, 15 deletions
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp index a51a07b7..42b0ed8 100644 --- a/llvm/unittests/Support/TargetParserTest.cpp +++ b/llvm/unittests/Support/TargetParserTest.cpp @@ -1591,23 +1591,25 @@ TEST(TargetParserTest, testAArch64Extension) { TEST(TargetParserTest, AArch64ExtensionFeatures) { std::vector<uint64_t> Extensions = { - AArch64::AEK_CRC, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_CRYPTO, AArch64::AEK_SM4, AArch64::AEK_SHA3, - AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_DOTPROD, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_FP16, - AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_RAS, - AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2AES, - AArch64::AEK_SVE2SM4, AArch64::AEK_SVE2SHA3, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_RCPC, AArch64::AEK_RAND, AArch64::AEK_MTE, - AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, - AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_F32MM, - AArch64::AEK_F64MM, AArch64::AEK_TME, AArch64::AEK_LS64, - AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, + AArch64::AEK_CRC, AArch64::AEK_LSE, AArch64::AEK_RDM, + AArch64::AEK_CRYPTO, AArch64::AEK_SM4, AArch64::AEK_SHA3, + AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_DOTPROD, + AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_FP16, + AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_RAS, + AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2AES, + AArch64::AEK_SVE2SM4, AArch64::AEK_SVE2SHA3, AArch64::AEK_SVE2BITPERM, + AArch64::AEK_RCPC, AArch64::AEK_RAND, AArch64::AEK_MTE, + AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, + AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_F32MM, + AArch64::AEK_F64MM, AArch64::AEK_TME, AArch64::AEK_LS64, + AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, AArch64::AEK_SME, AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64, - AArch64::AEK_SME2, AArch64::AEK_HBC, AArch64::AEK_MOPS, - AArch64::AEK_PERFMON, AArch64::AEK_SVE2p1, AArch64::AEK_SME2p1, + AArch64::AEK_SME2, AArch64::AEK_HBC, AArch64::AEK_MOPS, + AArch64::AEK_PERFMON, AArch64::AEK_SVE2p1, AArch64::AEK_SME2p1, AArch64::AEK_B16B16, AArch64::AEK_SMEF16F16, AArch64::AEK_CSSC, - AArch64::AEK_RCPC3}; + AArch64::AEK_RCPC3, AArch64::AEK_THE, AArch64::AEK_D128, + AArch64::AEK_LSE128, + }; std::vector<StringRef> Features; @@ -1674,6 +1676,9 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+perfmon")); EXPECT_TRUE(llvm::is_contained(Features, "+cssc")); EXPECT_TRUE(llvm::is_contained(Features, "+rcpc3")); + EXPECT_TRUE(llvm::is_contained(Features, "+the")); + EXPECT_TRUE(llvm::is_contained(Features, "+d128")); + EXPECT_TRUE(llvm::is_contained(Features, "+lse128")); // Assuming we listed every extension above, this should produce the same // result. (note that AEK_NONE doesn't have a name so it won't be in the |
