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authorCaroline Concatto <caroline.concatto@arm.com>2022-10-06 12:38:42 +0100
committerCaroline Concatto <caroline.concatto@arm.com>2022-10-13 11:28:08 +0100
commit3ee96a26d59d57867a270ee82f16c3a36947a4fb (patch)
tree971a9da54250eb4130152e95a302bb0a2700bc9f /llvm/unittests/Support/TargetParserTest.cpp
parentd44cd1bbeb7542eba06401279e5f2c117247019b (diff)
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[AArch64] Add SME 2 target feature for Armv8-A and Armv9-A 2022 Architecture Extension
First patch in a series adding MC layer support for Scalable Matrix Extension 2 (SME2). This patch adds the following feature: sme2 The 2022 Architecture Extension release adds other feature flags(eg.:sme2.1), that will be in follow-up patches. The reference can be found here: https://developer.arm.com/documentation/ddi0602/2022-09 Differential Revision: https://reviews.llvm.org/D135448
Diffstat (limited to 'llvm/unittests/Support/TargetParserTest.cpp')
-rw-r--r--llvm/unittests/Support/TargetParserTest.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp
index 06008ee..4308d25 100644
--- a/llvm/unittests/Support/TargetParserTest.cpp
+++ b/llvm/unittests/Support/TargetParserTest.cpp
@@ -1504,7 +1504,8 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_F64MM, AArch64::AEK_TME, AArch64::AEK_LS64,
AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM,
AArch64::AEK_SME, AArch64::AEK_SMEF64, AArch64::AEK_SMEI64,
- AArch64::AEK_HBC, AArch64::AEK_MOPS, AArch64::AEK_PERFMON};
+ AArch64::AEK_SME2, AArch64::AEK_HBC, AArch64::AEK_MOPS,
+ AArch64::AEK_PERFMON};
std::vector<StringRef> Features;
@@ -1561,6 +1562,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+sme"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme-f64"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme-i64"));
+ EXPECT_TRUE(llvm::is_contained(Features, "+sme2"));
EXPECT_TRUE(llvm::is_contained(Features, "+hbc"));
EXPECT_TRUE(llvm::is_contained(Features, "+mops"));
EXPECT_TRUE(llvm::is_contained(Features, "+perfmon"));
@@ -1639,6 +1641,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
{"sme", "nosme", "+sme", "-sme"},
{"sme-f64", "nosme-f64", "+sme-f64", "-sme-f64"},
{"sme-i64", "nosme-i64", "+sme-i64", "-sme-i64"},
+ {"sme2", "nosme2", "+sme2", "-sme2"},
{"hbc", "nohbc", "+hbc", "-hbc"},
{"mops", "nomops", "+mops", "-mops"},
{"pmuv3", "nopmuv3", "+perfmon", "-perfmon"},