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| author | Luke Lau <luke@igalia.com> | 2024-07-09 14:57:21 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-07-09 14:57:21 +0800 |
| commit | ed51908cec879c9dff435abdc70d8b03afc35c07 (patch) | |
| tree | 6e346b8a34cc4eef4f9e8bd91e3cb944743a267b /llvm/unittests/Support/MathExtrasTest.cpp | |
| parent | 2abe53a17f486a055a3715f19a37e3e91b4415fc (diff) | |
| download | llvm-ed51908cec879c9dff435abdc70d8b03afc35c07.zip llvm-ed51908cec879c9dff435abdc70d8b03afc35c07.tar.gz llvm-ed51908cec879c9dff435abdc70d8b03afc35c07.tar.bz2 | |
[RISCV] Emit VP strided load in mgather combine. NFCI (#98112)
This combine is a duplication of the transform in
RISCVGatherScatterLowering but at the SelectionDAG level, so similarly
to #98111 we can replace the use of riscv_masked_strided_load with a VP
strided load.
Unlike #98111 we don't require #97800 or #97798 since it only operates
on fixed vectors with a non-zero stride.
Diffstat (limited to 'llvm/unittests/Support/MathExtrasTest.cpp')
0 files changed, 0 insertions, 0 deletions