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| author | Michael Maitland <michaeltmaitland@gmail.com> | 2024-08-19 09:41:42 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-19 09:41:42 -0400 |
| commit | 7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce (patch) | |
| tree | f2038bf762afb69a895a0d535c4e4669d8524f83 /llvm/unittests/Support/MathExtrasTest.cpp | |
| parent | 3188e9b4e0f106abd683829906a21a98655bb794 (diff) | |
| download | llvm-7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce.zip llvm-7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce.tar.gz llvm-7efa068f7a7ed4f42ba09cce73e8c09bb8b4e8ce.tar.bz2 | |
[RISCV] Add vector and vector crypto to SiFiveP400 scheduler model (#102155)
The SiFiveP400 scheduler model did not support vector or vector crypto.
With the addition of the sifive-p470 processor, this model needs to support
these extensions.
The processors who use this model but do not have vector or vector
crypto will never produce these instructions, so there is no impact to these
processors.
Co-authored-by: Min Hsu <min.hsu@sifive.com>
Diffstat (limited to 'llvm/unittests/Support/MathExtrasTest.cpp')
0 files changed, 0 insertions, 0 deletions