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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-19 11:45:45 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-02-19 11:45:57 +0000 |
| commit | 4af8db317d2ac3f21b859e43a3240c024457a95d (patch) | |
| tree | 0abf3ef3d847cb608b4e024a599ba82f0856ae41 /llvm/unittests/Support/ErrorTest.cpp | |
| parent | fceb3e3b4aec635d4e31dda618c7e4c17516cdb9 (diff) | |
| download | llvm-4af8db317d2ac3f21b859e43a3240c024457a95d.zip llvm-4af8db317d2ac3f21b859e43a3240c024457a95d.tar.gz llvm-4af8db317d2ac3f21b859e43a3240c024457a95d.tar.bz2 | |
[AMDGPU] performCvtF32UByteNCombine - add SHL and SimplifyMultipleUseDemandedBits support
This is part of the work to remove SelectionDAG::GetDemandedBits and just use SimplifyMultipleUseDemandedBits.
Recent experiments raised some v_cvt_f32_ubyte*_e32 regressions, so I've added some additional abilities to performCvtF32UByteNCombine to help unpack byte data more aggressively.
We still don't remove all OR(SHL,SRL) patterns as some of the regenerated nodes don't get combined again, but we are getting closer.
Differential Revision: https://reviews.llvm.org/D74786
Diffstat (limited to 'llvm/unittests/Support/ErrorTest.cpp')
0 files changed, 0 insertions, 0 deletions