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| author | Craig Topper <craig.topper@sifive.com> | 2024-12-06 21:45:31 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-12-06 21:49:35 -0800 |
| commit | 495816cbc83b0760442568da18317df0955a289f (patch) | |
| tree | fae5105302b3b631b5f01a1a1302041d61ecb3bc /llvm/unittests/ProfileData/MemProfTest.cpp | |
| parent | 52646d087cdecd217436b2714f94b84c46b5720a (diff) | |
| download | llvm-495816cbc83b0760442568da18317df0955a289f.zip llvm-495816cbc83b0760442568da18317df0955a289f.tar.gz llvm-495816cbc83b0760442568da18317df0955a289f.tar.bz2 | |
[RISCV] Add i16->i32 G_ZEXT/G_SEXT patterns for RV64.
Because we support s16 and s32 types for FP some operations like
G_PHI, G_SELECT, G_FREEZE can exist with s16 and s32 operands
even when they will be assigned to the GPR reg bank. These
instructions can be surrounded with G_ZEXT and G_SEXT that convert
from s16 to s32 so we need to be able to select them.
Diffstat (limited to 'llvm/unittests/ProfileData/MemProfTest.cpp')
0 files changed, 0 insertions, 0 deletions