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| author | knickish <knickish@gmail.com> | 2024-12-11 19:19:24 -0600 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-11 17:19:24 -0800 |
| commit | 44c05a627ffb4bdd63b477d2d74b2b6db2f87c74 (patch) | |
| tree | d523a95f908de9c2cccdf69f0a3ceb793f50eb82 /llvm/unittests/ProfileData/MemProfTest.cpp | |
| parent | 956d0dd624758599ec7411997ef65f6ad16823f1 (diff) | |
| download | llvm-44c05a627ffb4bdd63b477d2d74b2b6db2f87c74.zip llvm-44c05a627ffb4bdd63b477d2d74b2b6db2f87c74.tar.gz llvm-44c05a627ffb4bdd63b477d2d74b2b6db2f87c74.tar.bz2 | |
[M68k] add 32 bit branch instrs and relaxations (#117371)
The `Bcc` and `BRA` 32-bit variants were all either not present or not
used, and the `BSR32` instruction was incorrectly being used on <
`M68020` cpu types. This PR adds missing 32 bit branch instructions
(with the `AtLeastM68020` predicate) and updates `M68kAsmBackend` to
allow relaxation to these instructions when an `M68020` or greater is
targeted
Diffstat (limited to 'llvm/unittests/ProfileData/MemProfTest.cpp')
0 files changed, 0 insertions, 0 deletions