diff options
| author | Roman Gareev <gareevroman@gmail.com> | 2016-12-25 16:32:28 +0000 |
|---|---|---|
| committer | Roman Gareev <gareevroman@gmail.com> | 2016-12-25 16:32:28 +0000 |
| commit | 1c2927b209295d8d150cde14baf5dfff6aae2282 (patch) | |
| tree | 37a1251ffe8fb770d1d109b115fb916536828bff /llvm/unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp | |
| parent | 86602e85dd9db362eb5ad185992dec3cac1a0900 (diff) | |
| download | llvm-1c2927b209295d8d150cde14baf5dfff6aae2282.zip llvm-1c2927b209295d8d150cde14baf5dfff6aae2282.tar.gz llvm-1c2927b209295d8d150cde14baf5dfff6aae2282.tar.bz2 | |
Specify the default values of the cache parameters
If the parameters of the target cache (i.e., cache level sizes, cache level
associativities) are not specified or have wrong values, we use ones for
parameters of the macro-kernel and do not perform data-layout optimizations of
the matrix multiplication. In this patch we specify the default values of the
cache parameters to be able to apply the pattern matching optimizations even in
this case. Since there is no typical values of this parameters, we use the
parameters of Intel Core i7-3820 SandyBridge that also help to attain the
high-performance on IBM POWER System S822 and IBM Power 730 Express server.
Reviewed-by: Tobias Grosser <tobias@grosser.es>
Differential Revision: https://reviews.llvm.org/D28090
llvm-svn: 290518
Diffstat (limited to 'llvm/unittests/ExecutionEngine/Orc/RPCUtilsTest.cpp')
0 files changed, 0 insertions, 0 deletions