GlobalISel/Utils: Refactor integer/float constant match functions

Rework getConstantstVRegValWithLookThrough in order to make it clear if we
are matching integer/float constant only or any constant(default).
Add helper functions that get DefVReg and APInt/APFloat from constant instr
getIConstantVRegValWithLookThrough: integer constant, only G_CONSTANT
getFConstantVRegValWithLookThrough: float constant, only G_FCONSTANT
getAnyConstantVRegValWithLookThrough: either G_CONSTANT or G_FCONSTANT

Rename getConstantVRegVal and getConstantVRegSExtVal to getIConstantVRegVal
and getIConstantVRegSExtVal. These now only match G_CONSTANT as described
in comment.

Relevant matchers now return both DefVReg and APInt/APFloat.

Replace existing uses of getConstantstVRegValWithLookThrough and
getConstantVRegVal with new helper functions. Any constant match is
only required in:
ConstantFoldBinOp: for constant argument that was bit-cast of float to int
getAArch64VectorSplat: AArch64::G_DUP operands can be any constant
amdgpu select for G_BUILD_VECTOR_TRUNC: operands can be any constant

In other places use integer only constant match.

Differential Revision: https://reviews.llvm.org/D104409

1 files changed, 22 insertions, 3 deletions

diff --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
index 24c1334..9ebb4b1 100644
--- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
@@ -45,10 +45,10 @@ TEST_F(AArch64GISelMITest, MatchIntConstantRegister) {
   if (!TM)
     return;
   auto MIBCst = B.buildConstant(LLT::scalar(64), 42);
-  Register Src0;
-  bool match = mi_match(MIBCst.getReg(0), *MRI, m_ICst(Src0));
+  Optional<ValueAndVReg> Src0;
+  bool match = mi_match(MIBCst.getReg(0), *MRI, m_GCst(Src0));
   EXPECT_TRUE(match);
-  EXPECT_EQ(Src0, MIBCst.getReg(0));
+  EXPECT_EQ(Src0->VReg, MIBCst.getReg(0));
 }
 
 TEST_F(AArch64GISelMITest, MachineInstrPtrBind) {
@@ -555,6 +555,25 @@ TEST_F(AArch64GISelMITest, MatchAllOnesInt) {
   EXPECT_FALSE(mi_match(FortyTwo.getReg(0), *MRI, m_AllOnesInt()));
 }
 
+TEST_F(AArch64GISelMITest, MatchFPOrIntConst) {
+  setUp();
+  if (!TM)
+    return;
+
+  Register IntOne = B.buildConstant(LLT::scalar(64), 1).getReg(0);
+  Register FPOne = B.buildFConstant(LLT::scalar(64), 1.0).getReg(0);
+  Optional<ValueAndVReg> ValReg;
+  Optional<FPValueAndVReg> FValReg;
+
+  EXPECT_TRUE(mi_match(IntOne, *MRI, m_GCst(ValReg)));
+  EXPECT_EQ(IntOne, ValReg->VReg);
+  EXPECT_FALSE(mi_match(IntOne, *MRI, m_GFCst(FValReg)));
+
+  EXPECT_FALSE(mi_match(FPOne, *MRI, m_GCst(ValReg)));
+  EXPECT_TRUE(mi_match(FPOne, *MRI, m_GFCst(FValReg)));
+  EXPECT_EQ(FPOne, FValReg->VReg);
+}
+
 TEST_F(AArch64GISelMITest, MatchNeg) {
   setUp();
   if (!TM)