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| author | Alex Bradbury <asb@lowrisc.org> | 2018-06-08 10:39:05 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2018-06-08 10:39:05 +0000 |
| commit | ed53ca73eccf41b72b672d3829862ad5a8771ef5 (patch) | |
| tree | 531adf8718586dd880dedc10162b2e1b3e24a78d /llvm/unittests/ADT/StringRefTest.cpp | |
| parent | a3ee1e7f9208e1ae40eb23e030de9570f6523e3b (diff) | |
| download | llvm-ed53ca73eccf41b72b672d3829862ad5a8771ef5.zip llvm-ed53ca73eccf41b72b672d3829862ad5a8771ef5.tar.gz llvm-ed53ca73eccf41b72b672d3829862ad5a8771ef5.tar.bz2 | |
[RISCV] Implement MC layer support for the fence.tso instruction
The instruction makes use of a previously ignored field in the fence
instruction. It is introduced in the version 2.3 draft of the RISC-V
specification after much work by the Memory Model Task Group.
As clarified here <https://github.com/riscv/riscv-isa-manual/issues/186>,
the fence.tso assembler mnemonic does not have operands.
llvm-svn: 334278
Diffstat (limited to 'llvm/unittests/ADT/StringRefTest.cpp')
0 files changed, 0 insertions, 0 deletions