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authorPaul Walker <paul.walker@arm.com>2025-04-30 13:21:46 +0100
committerGitHub <noreply@github.com>2025-04-30 13:21:46 +0100
commit8dc89e34199b6b1d0f5ea1f9940ccc8e957eef0a (patch)
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[LLVM][InstCombine] Enable constant folding for SVE asr,lsl and lsr intrinsics. (#137350)
The SVE intrinsics support shift amounts greater-than-or-equal to the element type's bit-length, essentially saturating the shift amount to the bit-length. However, the IR instructions consider this undefined behaviour that results in poison. To account for this we now ignore the result of the simplifications that result in poison. This allows existing code to be used to simplify the shifts but does mean: 1) We don't simplify cases like "svlsl_s32(x, splat(32)) => 0". 2) We no longer constant fold cases like "svadd(poison, X) => poison" For (1) we'd need dedicated target specific combines anyway and the result of (2) is not specified by the ACLE and replicating LLVM IR behaviour might be confusing to ACLE writers.
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