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| author | Mathieu Fehr <mathieu.fehr@gmail.com> | 2021-10-18 15:45:53 +0000 |
|---|---|---|
| committer | River Riddle <riddleriver@gmail.com> | 2021-10-18 15:46:08 +0000 |
| commit | 6d6ad76a6037f0aac03f122371cf60af65482989 (patch) | |
| tree | 86d3afc37bfb9642a00897bdfe4379c476ac4745 /llvm/unittests/ADT/APIntTest.cpp | |
| parent | d78136121eb1ddbc416648f9f08be2e87709b06a (diff) | |
| download | llvm-6d6ad76a6037f0aac03f122371cf60af65482989.zip llvm-6d6ad76a6037f0aac03f122371cf60af65482989.tar.gz llvm-6d6ad76a6037f0aac03f122371cf60af65482989.tar.bz2 | |
[mlir][NFC] Provide accessor for TableGen record for constraints
Besides accessing the record, there is currently no way to access all possible
constraint informations, such as the base constraint of a variadic constraint
for example.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D111719
Diffstat (limited to 'llvm/unittests/ADT/APIntTest.cpp')
0 files changed, 0 insertions, 0 deletions