diff options
| author | chendewen <chendewen3@huawei.com> | 2023-01-18 11:02:46 +0800 |
|---|---|---|
| committer | zhongyunde <zhongyunde@huawei.com> | 2023-01-18 11:06:13 +0800 |
| commit | d0942df43e5eb02bdcc44d499d62924214feef63 (patch) | |
| tree | 4fbe1a8c774a1f74e4c858599ad9614bdc43b322 /llvm/tools/llvm-reduce/llvm-reduce.cpp | |
| parent | 1a1ddf05cb8e86e8b6fa17525cff43026ed3883a (diff) | |
| download | llvm-d0942df43e5eb02bdcc44d499d62924214feef63.zip llvm-d0942df43e5eb02bdcc44d499d62924214feef63.tar.gz llvm-d0942df43e5eb02bdcc44d499d62924214feef63.tar.bz2 | |
[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
The REINTERPRET_CAST operation generates redundant and and ptrue instructions.
For some instructions, this is redundant, because its inactive lanes are zeroed by construction.
For example. Codegen before:
```
facgt p2.d, p0/z, z4.d, z1.d
ptrue p1.d
and p1.b, p2/z, p2.b, p1.b
```
After:
```
facgt p1.d, p0/z, z4.d, z1.d
```
ref: https://reviews.llvm.org/D129851
Reviewed By:sdesmalen,paulwalker-arm
Differential Revision:https://reviews.llvm.org/D141469
Diffstat (limited to 'llvm/tools/llvm-reduce/llvm-reduce.cpp')
0 files changed, 0 insertions, 0 deletions