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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-05 02:46:53 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-11-05 02:46:53 +0000 |
| commit | bed42a7320862a23ff753fd1f5c868c11493d37a (patch) | |
| tree | 4dd4db0b8e479aab85317760da5f7d3ef897c696 /llvm/tools/llvm-readobj/llvm-readobj.cpp | |
| parent | 0caf6dadce2026fe826e7a40b3766cf412f84e89 (diff) | |
| download | llvm-bed42a7320862a23ff753fd1f5c868c11493d37a.zip llvm-bed42a7320862a23ff753fd1f5c868c11493d37a.tar.gz llvm-bed42a7320862a23ff753fd1f5c868c11493d37a.tar.bz2 | |
AMDGPU: Make addr64 atomic operand order consistent
vaddr comes before srsrc in every other MUBUF instruction,
and is the order it is printed.
llvm-svn: 252139
Diffstat (limited to 'llvm/tools/llvm-readobj/llvm-readobj.cpp')
0 files changed, 0 insertions, 0 deletions