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authorSam Elliott <aelliott@qti.qualcomm.com>2025-10-01 18:00:40 +0100
committerGitHub <noreply@github.com>2025-10-01 10:00:40 -0700
commit42ab473f518c5f180455c674cbaba70a0b2634b7 (patch)
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parent240b73e10f5c6549776cfd3847db2be14dc42776 (diff)
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[RISCV] Xqci with Short Forward Branches (#161407)
This change implements support for the combination of Xqci and the Short Forward Branch optimisation. In particular, we want to prioritise `Branch+ALU` (short forward branches) over the equivalent `ALU+CMov`, when the compared values are both registers, and the selected values come from registers (as this is what `PseudoCCMOVGPR` supports). However, when expanding `PseudoCCMOVGPR` (i.e., `Branch+MV`), we instead want to expand it to a conditional move (for code size reasons), so I have added `RISCVExpandPseudo::expandCCOpToCMov` to try to do so. This mostly works, except if `PseudoCCMOVGPR` is comparing against zero and gets commuted - as can be seen in one example in `foo` in `select-cc.ll`. This change: - updates the attributes used for the XQCI RUN lines for the select tests. - modifies the CodeGen patterns and predicates to prioritise selecting the SFB Pseudo. - adds CodeGen patterns for MVLTI/MVLTUI/MVGEI/MVGEUI with imm=zero, to prioritise over the equivalent `Select_GPR_Using_CC_GPR` patterns for rhs=X0. - adds a hook to attempt to turn the predicated-mov Pseudo back into a Conditional Move from Xqcicm (which matches the pseudo in terms of tied register operands).
Diffstat (limited to 'llvm/tools/llvm-readobj/llvm-readobj.cpp')
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