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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-04-04 11:42:06 +0100 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2020-04-04 13:08:25 +0100 |
| commit | e5e719d8854a6bca60aff1d87f5b5eb556f55695 (patch) | |
| tree | a189dd664339f880fd47e2a57e3db0a50b4833cf /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | b90ea4f34194eb065ee72e0f49d2a97e8de30585 (diff) | |
| download | llvm-e5e719d8854a6bca60aff1d87f5b5eb556f55695.zip llvm-e5e719d8854a6bca60aff1d87f5b5eb556f55695.tar.gz llvm-e5e719d8854a6bca60aff1d87f5b5eb556f55695.tar.bz2 | |
[X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+
Similar to the lowerV16I8Shuffle implementation, for binary compaction v8i16 shuffles we can avoid the PUNPCKLDQ(PSHUFB,PSHUFB) pattern on SSE41+ targets by using PACKUSDW and PBLENDW. Before SSE41 we would need to use PACKSSDW but that requires sign extension that seems to destroy any gains, even on targets without PSHUFB.
This is a bigger gain on AMD than Intel targets but should never be a regression, and avoiding the shuffle mask load(s) is always useful.
Noticed in codegen while dealing with PR31443.
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
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