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| author | Amara Emerson <amara@apple.com> | 2022-10-03 15:19:05 +0100 |
|---|---|---|
| committer | Amara Emerson <amara@apple.com> | 2022-10-03 21:39:53 +0100 |
| commit | dcd02a524befcec71f46ab76d725b2a8f8623d69 (patch) | |
| tree | 3c9201cc9c132430906efc1c2f90bd4663896efd /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 07ccf651b95b3d92904e5d513772ad51567d8334 (diff) | |
| download | llvm-dcd02a524befcec71f46ab76d725b2a8f8623d69.zip llvm-dcd02a524befcec71f46ab76d725b2a8f8623d69.tar.gz llvm-dcd02a524befcec71f46ab76d725b2a8f8623d69.tar.bz2 | |
[AArch64][GlobalISel] Fold away lowered vector sign-extend of vector compares.
This fixes a long standing cause of awful code generation when legalization creates
G_SEXT(G_FCMP(...)), for example due to promoting the condition of a vector G_SELECT.
Since on AArch64 vector compares sign-extend the condition value, there's no need
for this extra G_SEXT. Unfortunately by the time we get to post-legalization these
G_SEXTs have already been lowered into shifts, so this combine is a bit more
involved than I'd ideally like. Oh well.
Differential Revision: https://reviews.llvm.org/D135078
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions