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| author | Roman Lebedev <lebedev.ri@gmail.com> | 2021-10-04 14:23:42 +0300 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2021-10-04 14:34:33 +0300 |
| commit | d3bbe781ea8e6e968ad4be2eb3aa5eedb168a4a8 (patch) | |
| tree | 934b2b0bb53f7cbcc5a0ad7227e654bfd874e8e3 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 4ca5bc07af0685fbbe04e8731b4ab37354368c84 (diff) | |
| download | llvm-d3bbe781ea8e6e968ad4be2eb3aa5eedb168a4a8.zip llvm-d3bbe781ea8e6e968ad4be2eb3aa5eedb168a4a8.tar.gz llvm-d3bbe781ea8e6e968ad4be2eb3aa5eedb168a4a8.tar.bz2 | |
[X86][Costmodel] Load/store i64/f64 Stride=3 VF=2 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/sz5qdKnr4 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `1`.
For store we have:
https://godbolt.org/z/Kzdjff63v - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=3.0`
So pick cost of `4`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D111025
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
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