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| author | Farhana Aleen <farhana.aleen@gmail.com> | 2018-03-09 17:41:39 +0000 |
|---|---|---|
| committer | Farhana Aleen <farhana.aleen@gmail.com> | 2018-03-09 17:41:39 +0000 |
| commit | a7cb31123c2526f04e6a587d6ada4084cefe6fb4 (patch) | |
| tree | 0f2e93bca2bbcf7eb638c5a1dad49127172cd5f8 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 91fc4e09499c24e9184853e9a53a953bdea8a356 (diff) | |
| download | llvm-a7cb31123c2526f04e6a587d6ada4084cefe6fb4.zip llvm-a7cb31123c2526f04e6a587d6ada4084cefe6fb4.tar.gz llvm-a7cb31123c2526f04e6a587d6ada4084cefe6fb4.tar.bz2 | |
[AMDGPU] Supported ds_read_b128 generation; Widened vector length for local address-space.
Summary: Starting from GCN 2nd generation, ISA supports ds_read_b128 on top of ds_read_b64.
This patch supports ds_read_b128 instruction pattern and generation of this instruction.
In the vectorizer, this patch also widen the vector length so that vectorizer generates
128 bit loads for local address-space which gets translated to ds_read_b128.
Since the performance benefit is not clear; compiler generates ds_read_b128 under -amdgpu-ds128.
Author: FarhanaAleen
Reviewed By: rampitec, arsenm
Subscribers: llvm-commits, AMDGPU
Differential Revision: https://reviews.llvm.org/D44210
llvm-svn: 327153
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions