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| author | Amara Emerson <aemerson@apple.com> | 2019-04-09 21:22:43 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2019-04-09 21:22:43 +0000 |
| commit | 9bf092d71989771fafc8c7c775dba8bb3779b5bd (patch) | |
| tree | 7fc5a6c9902fef3fcf8bbd5e4329ae83078d2ed8 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 888dd5d198c9a4bda951dd613378a82b1757e2a3 (diff) | |
| download | llvm-9bf092d71989771fafc8c7c775dba8bb3779b5bd.zip llvm-9bf092d71989771fafc8c7c775dba8bb3779b5bd.tar.gz llvm-9bf092d71989771fafc8c7c775dba8bb3779b5bd.tar.bz2 | |
[AArch64][GlobalISel] Add isel support for vector G_ICMP and G_ASHR & G_SHL
The selection for G_ICMP is unfortunately not currently importable from SDAG
due to the use of custom SDNodes. To support this, this selection method has an
opcode table which has been generated by a script, indexed by various
instruction properties. Ideally in future we will have a GISel native selection
patterns that we can write in tablegen to improve on this.
For selection of some types we also need support for G_ASHR and G_SHL which are
generated as a result of legalization. This patch also adds support for them,
generating the same code as SelectionDAG currently does.
Differential Revision: https://reviews.llvm.org/D60436
llvm-svn: 358035
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions