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authorDavid Green <david.green@arm.com>2020-04-22 13:30:22 +0100
committerDavid Green <david.green@arm.com>2020-04-22 14:16:51 +0100
commit892af45c8697849666ea26e20492603b11533866 (patch)
tree7af0b2d508d1e155ed42b08c09d41a41c93b8b9c /llvm/tools/llvm-objdump/llvm-objdump.cpp
parent4eca1c06a4a9183fcf7bb230d894617caf3cf3be (diff)
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[ARM] Distribute MVE post-increments
This adds some extra processing into the Pre-RA ARM load/store optimizer to detect and merge MVE loads/stores and adds of the same base. This we don't always turn into a post-inc during ISel, and due to the nature of it being a graph we don't always know an order to use for the nodes, not knowing which nodes to make post-inc and which to use the new post-inc of. After ISel, we have an order that we can use to post-inc the following instructions. So this looks for a loads/store with a starting offset of 0, and an add/sub from the same base, plus a number of other loads/stores. We then do some checks and convert the zero offset load/store into a postinc variant. Any loads/stores after it have the offset subtracted from their immediates. For example: LDR #4 LDR #4 LDR #0 LDR_POSTINC #16 LDR #8 LDR #-8 LDR #12 LDR #-4 ADD #16 It only handles MVE loads/stores at the moment. Normal loads/store will be added in a followup patch, they just have some extra details to ensure that we keep generating LDRD/LDM successfully. Differential Revision: https://reviews.llvm.org/D77813
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
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