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author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2017-08-07 08:41:05 +0000 |
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committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2017-08-07 08:41:05 +0000 |
commit | 7dffb9bfa6087ce519f730eb6ab41a204f481a40 (patch) | |
tree | d17f4af164bd8de84b3c8f04d58f817eadff77ea /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
parent | 5d432ec929031da10cbbde65fa438b9f3d7356c9 (diff) | |
download | llvm-7dffb9bfa6087ce519f730eb6ab41a204f481a40.zip llvm-7dffb9bfa6087ce519f730eb6ab41a204f481a40.tar.gz llvm-7dffb9bfa6087ce519f730eb6ab41a204f481a40.tar.bz2 |
[ARM] Fix assembly and disassembly for VMRS/VMSR
This patch addresses two issues with assembly and disassembly for VMRS/VMSR:
1.currently VMRS/VMSR instructions accessing fpsid, mvfr{0-2} and fpexc, are
accepted for non ARMv8-A targets.
2. all VMRS/VMSR instructions accept writing/reading to PC and SP, when only
ARMv7-A and ARMv8-A should be allowed to write/read to SP and none to PC.
This patch addresses those issues and adds tests for these cases.
Differential Revision: https://reviews.llvm.org/D36306
llvm-svn: 310243
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions