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| author | Craig Topper <craig.topper@intel.com> | 2019-04-17 06:09:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-04-17 06:09:11 +0000 |
| commit | 6bf08027384200bf7ee45ccfd5b16fa7511566d0 (patch) | |
| tree | 899a2f7da102f87855ea6eaf426b58cc6ffeac97 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 57cef586729526fc31b1ec184612c5573f94f1b3 (diff) | |
| download | llvm-6bf08027384200bf7ee45ccfd5b16fa7511566d0.zip llvm-6bf08027384200bf7ee45ccfd5b16fa7511566d0.tar.gz llvm-6bf08027384200bf7ee45ccfd5b16fa7511566d0.tar.bz2 | |
[X86] In CopyToFromAsymmetricReg, use VR128 instead of FR32 instructions for GR32<->XMM register copies.
We have two versions of some instructions, VR128 versions and FR32 versions that
are marked as CodeGenOnly.
This change switches to using the VR128 versions for these copies. It's after
register allocation so the class size no longer matters. This matches how GR64
works.
llvm-svn: 358555
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions