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| author | Craig Topper <craig.topper@intel.com> | 2018-08-02 23:30:38 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-08-02 23:30:38 +0000 |
| commit | 63873db5c42a4f7d86778db9d4bf738f06fb443b (patch) | |
| tree | f21d2a9eaf62c5c6f74991536fec01cf55df8c80 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 2deeeae2a511495836eb13603d1eae276b420e3e (diff) | |
| download | llvm-63873db5c42a4f7d86778db9d4bf738f06fb443b.zip llvm-63873db5c42a4f7d86778db9d4bf738f06fb443b.tar.gz llvm-63873db5c42a4f7d86778db9d4bf738f06fb443b.tar.bz2 | |
[X86] Allow 'atomic_store (neg/not atomic_load)' to isel to a RMW instruction.
There was a FIXMe in the td file about a type inference issue that was easy to fix.
llvm-svn: 338782
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions