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| author | David Green <david.green@arm.com> | 2020-03-13 09:04:50 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2020-03-13 10:09:03 +0000 |
| commit | 2c6c169dbd6041b4575b2234c532aad50a472e81 (patch) | |
| tree | 2edef7c2bdee734a491fd1c25bac07c88d931e72 /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | 5c68043b9fa7187ac52b178e62bfd51c11174d23 (diff) | |
| download | llvm-2c6c169dbd6041b4575b2234c532aad50a472e81.zip llvm-2c6c169dbd6041b4575b2234c532aad50a472e81.tar.gz llvm-2c6c169dbd6041b4575b2234c532aad50a472e81.tar.bz2 | |
[ARM] Optimise ASRL/LSRL to smaller shifts using demand bits.
The ASRL/LSRL long shifts are generated from 64bit shifts. Once we have
them, it might turn out that enough of the 64bit result was not required
that we can use a smaller shift to perform the same result. As the
smaller shift can in general be folded in more way, such as into add
instructions in one of the test cases here, we can use the demand bit
analysis to prefer the smaller shifts where we can.
Differential Revision: https://reviews.llvm.org/D75371
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions