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author | Guray Ozen <guray.ozen@gmail.com> | 2023-07-11 11:50:13 +0200 |
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committer | Guray Ozen <guray.ozen@gmail.com> | 2023-07-11 12:18:28 +0200 |
commit | 2c5739675cf8fc9191b8735be7c012e846fa49de (patch) | |
tree | ec17c6aa625b63a9ff3a80f54be0662e2e5eca3a /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
parent | dd080c7579e0c0e1d41dafb5dbea01343d6e0dc1 (diff) | |
download | llvm-2c5739675cf8fc9191b8735be7c012e846fa49de.zip llvm-2c5739675cf8fc9191b8735be7c012e846fa49de.tar.gz llvm-2c5739675cf8fc9191b8735be7c012e846fa49de.tar.bz2 |
[mlir][nvgpu] Implement `nvgpu.device_async_copy` by NVVMToLLVM Pass
`nvgpu.device_async_copy` is lowered into `cp.async` PTX instruction. However, NVPTX backend does not support its all mode especially when zero padding is needed. Therefore, current MLIR implementation genereates inline assembly for that.
This work simplifies PTX generation for `nvgpu.device_async_copy`, and implements it by `NVVMToLLVM` Pass.
Depends on D154060
Reviewed By: nicolasvasilache, manishucsd
Differential Revision: https://reviews.llvm.org/D154345
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions