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authorRahul Joshi <rjoshi@nvidia.com>2025-05-23 08:30:29 -0700
committerGitHub <noreply@github.com>2025-05-23 08:30:29 -0700
commit52c2e45c11ee37d8efcf87cbfa5c9f23cbdd566b (patch)
tree9fb4a446894837cc4d8d8d88594b1f2324faa829 /llvm/tools/llvm-exegesis/lib/Assembler.cpp
parent204eb70af894770fb4b9107fbcf3003cb3f9cb72 (diff)
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[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
Diffstat (limited to 'llvm/tools/llvm-exegesis/lib/Assembler.cpp')
-rw-r--r--llvm/tools/llvm-exegesis/lib/Assembler.cpp6
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
index 67f3d75..fd7924d 100644
--- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
@@ -257,9 +257,7 @@ Error assembleToStream(const ExegesisTarget &ET,
// We need to instruct the passes that we're done with SSA and virtual
// registers.
auto &Properties = MF.getProperties();
- Properties.set(MachineFunctionProperties::Property::NoVRegs);
- Properties.reset(MachineFunctionProperties::Property::IsSSA);
- Properties.set(MachineFunctionProperties::Property::NoPHIs);
+ Properties.setNoVRegs().resetIsSSA().setNoPHIs();
for (const MCRegister Reg : LiveIns)
MF.getRegInfo().addLiveIn(Reg);
@@ -300,7 +298,7 @@ Error assembleToStream(const ExegesisTarget &ET,
// means that we won't know what values are in the registers.
// FIXME: this should probably be an assertion.
if (!IsSnippetSetupComplete)
- Properties.reset(MachineFunctionProperties::Property::TracksLiveness);
+ Properties.resetTracksLiveness();
Fill(Sink);