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author | Geoff Berry <gberry@codeaurora.org> | 2016-08-12 15:26:00 +0000 |
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committer | Geoff Berry <gberry@codeaurora.org> | 2016-08-12 15:26:00 +0000 |
commit | 22dfbc563731c674c7a9e7b4c8292ded823220c5 (patch) | |
tree | baca8fbd06c301287928005319f2533dee5d6368 /llvm/lib/Transforms/Utils/Utils.cpp | |
parent | b623088abe69c439838ced036cc1474c818a170e (diff) | |
download | llvm-22dfbc563731c674c7a9e7b4c8292ded823220c5.zip llvm-22dfbc563731c674c7a9e7b4c8292ded823220c5.tar.gz llvm-22dfbc563731c674c7a9e7b4c8292ded823220c5.tar.bz2 |
[AArch64] Re-factor code shared by AArch64LoadStoreOpt and AArch64InstrInfo.
This re-factoring could cause the following slight changes in generated
code, though none were observed during testing:
- MachineScheduler could decide not to cluster some loads/stores if
there are other load/stores with non-pairable opcodes that have the
same base register and offset as a pairable set of load/stores. One
case of different MachineScheduler pairing did show up in my testing,
but it wasn't due to this issue, but due
BaseMemOpClusterMutation::clusterNeighboringMemOps() being unstable
w.r.t. the order it considers memory operations. See PR28942.
- The ImplicitNullChecks optimization could be done for more load/store
opcodes. This optimization isn't done for C/C++ code, so it didn't
show up in my testing.
Reviewers: mcrosier, t.p.northover
Subscribers: aemerson, rengolin, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D23365
llvm-svn: 278515
Diffstat (limited to 'llvm/lib/Transforms/Utils/Utils.cpp')
0 files changed, 0 insertions, 0 deletions