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| author | Craig Topper <craig.topper@sifive.com> | 2022-11-21 19:23:08 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-11-21 19:24:02 -0800 |
| commit | f99514ac3a6fbf8af619f45a93a22c81bb7f9e22 (patch) | |
| tree | 8aefa1edc8ddfae1033f5e937f0b7622753be938 /llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | |
| parent | 4e6adb394ebcdb2350fac6b47f7b789750e1f300 (diff) | |
| download | llvm-f99514ac3a6fbf8af619f45a93a22c81bb7f9e22.zip llvm-f99514ac3a6fbf8af619f45a93a22c81bb7f9e22.tar.gz llvm-f99514ac3a6fbf8af619f45a93a22c81bb7f9e22.tar.bz2 | |
[RISCV] Remove SExtWRemovalCands set from RISCVSExtWRemoval.
After D137970, we do the fixable instruction conversion in place
so we don't need to worry about iterator invalidation. This lets
us to conversion and updates in a single loop.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D138043
Diffstat (limited to 'llvm/lib/Transforms/Utils/SimplifyIndVar.cpp')
0 files changed, 0 insertions, 0 deletions