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| author | Craig Topper <craig.topper@intel.com> | 2018-06-13 00:04:08 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-06-13 00:04:08 +0000 |
| commit | 55488731be1b6df0a92683996ff2e34a06bae90b (patch) | |
| tree | faf822de2cd241a68accbceca75efcc2909c6667 /llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | |
| parent | 4f9cac667ba4a50a6e8c46a3c5337751beaa3430 (diff) | |
| download | llvm-55488731be1b6df0a92683996ff2e34a06bae90b.zip llvm-55488731be1b6df0a92683996ff2e34a06bae90b.tar.gz llvm-55488731be1b6df0a92683996ff2e34a06bae90b.tar.bz2 | |
[X86] Mark all instructions that have masked store semantics with NotMemoryFoldable. Remove dependency on SchedRW from memory table autogenerator.
Previously we were whitelisting in instructions based on their SchedRW value. With the masked store instructions explicitly removed via NotMemoryFoldable, we don't seem to need this check anymore.
llvm-svn: 334563
Diffstat (limited to 'llvm/lib/Transforms/Utils/SimplifyIndVar.cpp')
0 files changed, 0 insertions, 0 deletions