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author | Luke Lau <luke@igalia.com> | 2023-01-19 11:25:23 +0000 |
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committer | Luke Lau <luke@igalia.com> | 2023-01-24 09:44:57 +0000 |
commit | f5a644719657c25bdb298c17374578d2e9202197 (patch) | |
tree | e299dc775d7864238f17d73a1d154dff868298ff /llvm/lib/Transforms/Utils/ModuleUtils.cpp | |
parent | 8b1d86aedf13a22e283ee334304063febdaec9c7 (diff) | |
download | llvm-f5a644719657c25bdb298c17374578d2e9202197.zip llvm-f5a644719657c25bdb298c17374578d2e9202197.tar.gz llvm-f5a644719657c25bdb298c17374578d2e9202197.tar.bz2 |
[RISCV] Combine FP_TO_INT to vfwcvt/fvncvt
Adds new pseudo instructions to make sure that the fcvt instructions
have all rounding mode (RM) and unsigned (XU) variants across
single-width, widening and narrowing conversions.
And likewise, extends the VL patterns to accompany them. We don't add
new VL nodes for the widening/narrowing conversions though, instead we
just add specific patterns for vfcvts on those wider/narrower types.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D142102
Diffstat (limited to 'llvm/lib/Transforms/Utils/ModuleUtils.cpp')
0 files changed, 0 insertions, 0 deletions