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author | Carl Ritson <carl.ritson@amd.com> | 2022-10-01 09:17:42 +0900 |
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committer | Carl Ritson <carl.ritson@amd.com> | 2022-10-01 16:21:24 +0900 |
commit | a35013bec68db2cc3760c693dc4cb080f312396a (patch) | |
tree | 1d7db89c0f14197e056d6d836e007a09603a4b7c /llvm/lib/Transforms/Utils/LoopVersioning.cpp | |
parent | a5c46bf9521e34d7f8c6fa048014912afb910020 (diff) | |
download | llvm-a35013bec68db2cc3760c693dc4cb080f312396a.zip llvm-a35013bec68db2cc3760c693dc4cb080f312396a.tar.gz llvm-a35013bec68db2cc3760c693dc4cb080f312396a.tar.bz2 |
[AMDGPU][GFX11] Mitigate VALU mask write hazard
VALU use of an SGPR (pair) as mask followed by SALU write to the
same SGPR can cause incorrect execution of subsequent SALU reads
of the SGPR.
Reviewed By: foad, rampitec
Differential Revision: https://reviews.llvm.org/D134151
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopVersioning.cpp')
0 files changed, 0 insertions, 0 deletions