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| author | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2016-06-13 10:43:50 +0000 |
|---|---|---|
| committer | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2016-06-13 10:43:50 +0000 |
| commit | 8feacb330db3451372aa3052ff63211aee5953dc (patch) | |
| tree | 08e422d3f5afe71546f719bd0b3ec2c277869943 /llvm/lib/Transforms/Utils/LoopVersioning.cpp | |
| parent | f0980e4dc01990c1e3befb12d354805eb00864e1 (diff) | |
| download | llvm-8feacb330db3451372aa3052ff63211aee5953dc.zip llvm-8feacb330db3451372aa3052ff63211aee5953dc.tar.gz llvm-8feacb330db3451372aa3052ff63211aee5953dc.tar.bz2 | |
[ARM] Add mrrc/mrrc2 co-processor intrinsics
MRRC/MRRC2 instruction writes to two registers. The
intrinsic definition returns a single uint64_t to
represent the write, this is a compact way of
representing a write to two 32 bit registers,
the alternative might have been two return a
struct of 2 uint32_t's but this isn't as nice.
Differential Revision:
llvm-svn: 272544
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopVersioning.cpp')
0 files changed, 0 insertions, 0 deletions