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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-04 15:35:26 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-02-05 11:52:18 -0500 |
| commit | dfa9420f09f940db8785e6bdb43b41678b7ba681 (patch) | |
| tree | 2abb3f6b94a9fa0afd9028435df9a2b8fdc4da51 /llvm/lib/Transforms/Utils/LoopUtils.cpp | |
| parent | 2b7f32892b76cdfbe075300a5bf4a52e1b674bc7 (diff) | |
| download | llvm-dfa9420f09f940db8785e6bdb43b41678b7ba681.zip llvm-dfa9420f09f940db8785e6bdb43b41678b7ba681.tar.gz llvm-dfa9420f09f940db8785e6bdb43b41678b7ba681.tar.bz2 | |
AMDGPU/GlobalISel: Don't use legal v2s16 G_BUILD_VECTOR
If we have s_pack_* instructions, legalize this to
G_BUILD_VECTOR_TRUNC from s32 elements. This is closer to how how the
s_pack_* instructions really behave.
If we don't have s_pack_ instructions, expand this by creating a merge
to s32 and bitcasting. This expands to the expected bit operations. I
think this eventually should go in a new bitcast legalize action type
in LegalizerHelper.
We already directly emit the shift operations in RegBankSelect for the
vector case. This could possibly be cleaned up, but I also may want to
defer doing this expansion to selection anyway. I'll see about that
when I try to actually match VOP3P instructions.
This breaks the selection of the build_vector since tablegen doesn't
know how to match G_BUILD_VECTOR_TRUNC yet, so just xfail it for now.
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUtils.cpp')
0 files changed, 0 insertions, 0 deletions