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| author | Sanjay Patel <spatel@rotateright.com> | 2020-04-19 08:32:02 -0400 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2020-04-19 08:33:17 -0400 |
| commit | cceb630a07cc0852f81cb2a44aef8f248504bd0f (patch) | |
| tree | 8230dbd589ed244fcfe9dec475e052c46ad77aab /llvm/lib/Transforms/Utils/LoopUtils.cpp | |
| parent | 8c68de2d63000d2d66f2109665a892e673f93107 (diff) | |
| download | llvm-cceb630a07cc0852f81cb2a44aef8f248504bd0f.zip llvm-cceb630a07cc0852f81cb2a44aef8f248504bd0f.tar.gz llvm-cceb630a07cc0852f81cb2a44aef8f248504bd0f.tar.bz2 | |
[x86] use vector instructions to lower more FP->int->FP casts
This is an enhancement to D77895 to avoid another
round-trip from XMM->GPR->XMM. This time we handle
the case of starting/ending with an f64 and casting
to signed i32 as the intermediate value.
It's a bit more involved than I initially assumed
because we need to use target-specific opcodes to
represent the non-standard cast ops.
Differential Revision: https://reviews.llvm.org/D78362
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUtils.cpp')
0 files changed, 0 insertions, 0 deletions