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| author | Lei Huang <lei@ca.ibm.com> | 2021-11-12 15:05:52 -0600 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2021-11-15 14:36:39 -0600 |
| commit | f50c6c17185c5513b63ee94d64b2243e3d1b1726 (patch) | |
| tree | fc28f898cb3eec0f20ac8255d50e1e46504d361b /llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | |
| parent | 1ca00ecfb8f65cabef49bc823892c3e0aebcae97 (diff) | |
| download | llvm-f50c6c17185c5513b63ee94d64b2243e3d1b1726.zip llvm-f50c6c17185c5513b63ee94d64b2243e3d1b1726.tar.gz llvm-f50c6c17185c5513b63ee94d64b2243e3d1b1726.tar.bz2 | |
[PowerPC] Fix 32bit vector insert instructions for ISA3.1
The platform independent ISD::INSERT_VECTOR_ELT take a element index,
but vins* instructions take a byte index. Update 32bit td patterns for
vector insert to handle the element index accordingly.
Since vector insert for non constant index are supported in
ISA3.1, there is no need to use platform specific ISD node,
PPCISD::VECINSERT. Update td pattern to directly use
ISD::INSERT_VECTOR_ELT instead.
Reviewed By: nemanjai, #powerpc
Differential Revision: https://reviews.llvm.org/D113802
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp')
0 files changed, 0 insertions, 0 deletions