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| author | Craig Topper <craig.topper@intel.com> | 2017-09-03 17:52:25 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-09-03 17:52:25 +0000 |
| commit | 8ee36ffb54b87fba99aa8bd0190ab5aedc8f4d58 (patch) | |
| tree | 3cc22886fdff2fa466b858b462a4657c1a4576af /llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | |
| parent | fa82efb50a48b295a95ca01ef4c62ae3afc67a93 (diff) | |
| download | llvm-8ee36ffb54b87fba99aa8bd0190ab5aedc8f4d58.zip llvm-8ee36ffb54b87fba99aa8bd0190ab5aedc8f4d58.tar.gz llvm-8ee36ffb54b87fba99aa8bd0190ab5aedc8f4d58.tar.bz2 | |
[X86] Add patterns to turn an insert into lower subvector of a zero vector into a move instruction which will implicitly zero the upper elements.
Ideally we'd be able to emit the SUBREG_TO_REG without the explicit register->register move, but we'd need to be sure the producing operation would select something that guaranteed the upper bits were already zeroed.
llvm-svn: 312450
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp')
0 files changed, 0 insertions, 0 deletions