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| author | Vikram Hegde <115221833+vikramRH@users.noreply.github.com> | 2024-06-25 14:35:19 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-06-25 14:35:19 +0530 |
| commit | 5feb32ba929f9e517c530217cabb09d1d734a763 (patch) | |
| tree | b862c97e28dbbc19aabf0da1ef324c9d219a2e93 /llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp | |
| parent | 919b1ecafc010379eff88368b050068223a01f99 (diff) | |
| download | llvm-5feb32ba929f9e517c530217cabb09d1d734a763.zip llvm-5feb32ba929f9e517c530217cabb09d1d734a763.tar.gz llvm-5feb32ba929f9e517c530217cabb09d1d734a763.tar.bz2 | |
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
This patch is intended to be the first of a series with end goal to
adapt atomic optimizer pass to support i64 and f64 operations (along
with removing all unnecessary bitcasts). This legalizes 64 bit readlane,
writelane and readfirstlane ops pre-ISel
---------
Co-authored-by: vikramRH <vikhegde@amd.com>
Diffstat (limited to 'llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp')
0 files changed, 0 insertions, 0 deletions